cystech electronics corp. spec. no. : c075a3 issued date : 2016.02.02 revised date : page no. : 1/10 mtn1n60ba3 cystek product specification n-channel enhancement mode power mosfet mtn1n60ba3 bv dss 600v i d @v gs =10v, t c =25 c 0.8a r ds(on) @v gs =10v, i d =0.5a 7.8 (typ) features ? low on resistance ? simple drive requirement ? fast switching characteristic ? pb-free lead plating and halogen-free package applications ? adapter ? switching mode power supply symbol outline to-92 ordering information mtn1n60ba3 device package shipping mtn1n60ba3-0-tb-g to-92 (pb-free lead plating and halogen-free package) 2000 pcs / tape & box MTN1N60BA3-0-BK-G to-92 (pb-free lead plating and halogen-free package) 1000 pcs/ bag, 10 bags/box, 10boxes/carton g gate d drain s source g d s environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, tb :2000 pcs/tape & box; bk: 1000 pcs / bag, 10 bags/box, 10 boxes/carton product rank, zero for no rank products product name
cystech electronics corp. spec. no. : c075a3 issued date : 2016.02.02 revised date : page no. : 2/10 mtn1n60ba3 cystek product specification absolute maximum ratings (t c =25c) parameter symbol limits unit drain-source voltage v ds 600 gate-source voltage v gs 30 v continuous drain current @v gs =10v, t c =25 c 0.8* continuous drain current @v gs =10v, t c =100 c i d 0.5* pulsed drain current @ v gs =10v (note 1) i dm 3.2* single pulse avalanche current (note 2) i as 1 a single pulse avalanche energy (note 2) e as 5 repetitive avalanche energy (note 1) e ar 0.5 mj maximum temperature for soldering @ lead at 0.125 in(0.318mm) from case for 10 seconds t l 300 c total power dissipation (t a =25 ) 1 w w total power dissipation (t c =25 ) linear derating factor p d 5 0.04 w/ c operating junction and storage temperature tj, tstg -55~+150 c *drain current limited by maximum junction temperature note : 1 . repetitive rating; pulse width limited by maximum junction temperature. 2 . i as =1a, v dd =50v, l=10mh, r g =25 , starting t j =+25 . guaranteed by design, not by 100% test. thermal data parameter symbol value unit thermal resistance, junction-to-case, max r jc 25 thermal resistance, junction-to-ambient, max r ja 125 c/w
cystech electronics corp. spec. no. : c075a3 issued date : 2016.02.02 revised date : page no. : 3/10 mtn1n60ba3 cystek product specification characteristics (tj=25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss 600 - - v v gs =0v, i d =250 a, tj=25 ? bv dss / ? tj - 0.6 - v/ c reference to 25 c, i d =250 a v gs(th) 2.0 - 4.0 v v ds = v gs , i d =250 a *g fs - 1 - s v ds =15v, i d =0.5a i gss - - 100 na v gs = 30v - - 1 v ds =600v, v gs =0v i dss - - 10 a v ds =480v, v gs =0v, tj=125 c *r ds(on) - 7.8 9.8 v gs =10v, i d =0.5a dynamic *qg - 5 *qgs - 2.4 *qgd - 0.9 nc v ds =480v, i d =1a,v gs =10v *t d(on) - 5.6 *tr - 7.8 *t d(off) - 11.6 *t f - 12.6 ns v ds =300v, i d =1a, v gs =10v, r g =25 ciss - 135 - coss - 24.3 - crss - 10.7 - pf v gs =0v, v ds =25v, f=1mhz source-drain diode *i s - - 0.8 *i sm - - 3.2 a *v sd - 0.95 1.5 v i s =1a, v gs =0v *trr - 190 - ns *qrr - 340 - nc v gs =0v, i f =1a, di f /dt=100a/ s *pulse test : pulse width 300 s, duty cycle 2%
cystech electronics corp. spec. no. : c075a3 issued date : 2016.02.02 revised date : page no. : 4/10 mtn1n60ba3 cystek product specification typical characteristics typical output characteristics 0 0.5 1 1.5 2 2.5 0 1020304050 v ds , drain-source voltage(v) i d , drain current (a) v gs =4.5v 10v 9v 8v 7v 5v 5.5v 6v brekdown voltage vs ambient temperature 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, ambient temperature(c) bv dss , normalized drain-source breakdown voltage i d =250 a, v gs =0v static drain-source on-state resistance vs drain current 5 6 7 8 9 10 11 12 13 14 15 0.01 0.1 1 10 drain current-i d (a) static drain-source on-state resistance-r ds(on) () v gs =10v drain current vs gate-source voltage 0 0.5 1 1.5 2 2.5 0246810 v gs , gate-source voltage(v) i d , drain current(a) ta=25c v ds =30v v ds =10v static drain-source on-state resistance vs gate-source voltage 0 2 4 6 8 10 12 14 024681 0 forward drain current vs source-drain voltage 0.001 0.01 0.1 1 0 0.2 0.4 0.6 0.8 1 1.2 1.4 v sd , source drain voltage(v) i f , forward current(a) v gs =0v ta=25c ta=150c v gs , gate-source voltage(v) r ds(on) , static drain-source on-state resistance() i d =0.5a ta=25c
cystech electronics corp. spec. no. : c075a3 issued date : 2016.02.02 revised date : page no. : 5/10 mtn1n60ba3 cystek product specification typical characteristics(cont.) capacitance vs reverse voltage 1 10 100 1000 0 5 10 15 20 25 30 v ds , drain-to-source voltage(v) capacitance(pf) ciss coss crss f=1mhz static drain-source on-resistance vs ambient temperature 0.0 0.5 1.0 1.5 2.0 2.5 3.0 -75 -50 -25 0 25 50 75 100 125 150 175 t a , ambient temperature(c) r ds(on) , normalized static drain-source on-state resistance i d =0.5a, v gs =10v maximum safe operating area 0.001 0.01 0.1 1 10 1 10 100 1000 v ds , drain-source voltage(v) i d , drain current(a) r ds( on) limited dc 10 s t c =25c, tj(max)=150c v gs =10v, r jc =25c/w single pulse 100ms 10ms 1ms 100 s gate charge characteristics 0 2 4 6 8 10 0123456 qg, total gate charge(nc) v gs , gate-source voltage(v) i d =1a v ds =120v v ds =300v v ds =480v maximum drain current vs case temperature 0 0.2 0.4 0.6 0.8 1 25 50 75 100 125 150 175 t c , case temperature(c) i d , maximum drain current(a) v gs =10v, r jc =25c/w threshold voltage vs junction tempearture 0.2 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) v gs(th) , normalized threshold voltage i d =250 a i d =1ma
cystech electronics corp. spec. no. : c075a3 issued date : 2016.02.02 revised date : page no. : 6/10 mtn1n60ba3 cystek product specification typical characteristics(cont.) forward transfer admittance vs drain current 0.01 0.1 1 10 0.001 0.01 0.1 1 i d , drain current(a) g fs , forward transfer admittance(s) ta=25c pulsed v ds =15v single pulse power rating, junction to case 0 200 400 600 800 1000 1200 1400 1600 1800 2000 0.0001 0.001 0.01 0.1 1 10 pulse width(s) power (w) t j(max) =150c t c =25c r jc =25c/w transient thermal response curves 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 t 1 , square wave pulse duration(s) r(t), normalized effective transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r jc (t)=r(t)*r jc 2.duty factor, d=t 1 /t 2 3.t jm -t c =p dm *r jc (t) 4.r jc =25 c/w
cystech electronics corp. spec. no. : c075a3 issued date : 2016.02.02 revised date : page no. : 7/10 mtn1n60ba3 cystek product specification test circuit and waveforms
cystech electronics corp. spec. no. : c075a3 issued date : 2016.02.02 revised date : page no. : 8/10 mtn1n60ba3 cystek product specification test circuit and waveforms(cont.)
cystech electronics corp. spec. no. : c075a3 issued date : 2016.02.02 revised date : page no. : 9/10 mtn1n60ba3 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak 10-30 seconds 20-40 seconds temperature(tp) ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of the package, measured on the package body surface.
cystech electronics corp. spec. no. : c075a3 issued date : 2016.02.02 revised date : page no. : 10/10 mtn1n60ba3 cystek product specification to-92 dimension *: typical inches millimeters inches millimeters marking: dim min. max. min. max. dim min. max. min. max. a 0.1704 0.1902 4.33 4.83 g 0.0142 0.0220 0.36 0.56 b 0.1704 0.1902 4.33 4.83 h - * 0.1000 - * 2.54 c 0.5000 - 12.70 - i - * 0.0500 - * 1.27 d 0.0142 0.0220 0.36 0.56 1 - * 5 - * 5 e - * 0.0500 - * 1.27 2 - * 2 - * 2 f 0.1323 0.1480 3.36 3.76 3 - * 2 - * 2 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing spec ification or packing method, please cont act your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitab le for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance . 31 a d b c i 1 e f 2 cys 1n60b 2 date code 3 h g s t yle: pin 1.gate 2.drain 3.source 3-lead t o -92 plastic package cy s t ek p a cka g e code: a 3
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